RI=Val_0x0, DCD=Val_0x0, CTS=Val_0x0, DDCD=Val_0x0, TERI=Val_0x0, DSR=Val_0x0, DCTS=Val_0x0, DDSR=Val_0x0
Modem Status Register
| DCTS | Delta Clear to Send This bit is used to indicate that the modem control line CTS has changed since the last time the UART_MSR was read. Reading the UART_MSR clears the DCTS bit. In Loopback mode (UART_MCR[LOOPBACK] set to 1), DCTS reflects changes on UART_MCR[RTS]. If the DCTS bit is not set and the CTS signal is asserted (low) and a reset occurs, then the DCTS bit will get set when the reset is removed if the CTS signal remains asserted. 0 (Val_0x0): No change on CTS since last read of UART_MSR 1 (Val_0x1): Change on CTS since last read of UART_MSR |
| DDSR | Delta Data Set Ready This bit is used to indicate that the modem control line DSR has changed since the last time the UART_MSR was read. Reading the UART_MSR clears the DDSR bit. In Loopback mode (UART_MCR[LOOPBACK] set to 1), DDSR reflects changes on UART_MCR[DTR]. Note: If the DDSR bit is not set and the DSR signal is asserted (low) and a reset occurs, then the DDSR bit will get set when the reset is removed if the DSR signal remains asserted. 0 (Val_0x0): No change on DSR since last read of UART_MSR 1 (Val_0x1): Change on DSR since last read of UART_MSR |
| TERI | Trailing Edge of Ring Indicator This bit is used to indicate that a change on the input RI (from an active low, to an inactive high state) has occurred since the last time the UART_MSR was read. Reading the UART_MSR clears the TERI bit. In Loopback mode (UART_MCR[LOOPBACK] set to 1), this bit reflects when UART_MCR[OUT1] has changed state from a high to a low. 0 (Val_0x0): No change on RI since last read of UART_MSR 1 (Val_0x1): Change on RI since last read of UART_MSR |
| DDCD | Delta Data Carrier Detect This bit is used to indicate that the modem control line DCD has changed since the last time the UART_MSR was read. Reading the UART_MSR clears the DDCD bit. In Loopback mode (UART_MCR[LOOPBACK] set to 1), DDCD reflects changes on UART_MCR[OUT2]. if the DDCD bit is not set and the DCD signal is asserted (low) and a reset occurs, then the DDCD bit will get set when the reset is removed if the DCD signal remains asserted. 0 (Val_0x0): No change on DCD since last read of UART_MSR 1 (Val_0x1): Change on DCD since last read of UART_MSR |
| CTS | Clear to Send This bit is used to indicate the current state of the modem control line CTS. When this bit is asserted it is an indication that the modem or data set is ready to exchange data with the UART. In Loopback mode (UART_MCR[LOOPBACK] set to 1), CTS is the same as UART_MCR[RTS]. 0 (Val_0x0): CTS input is deasserted (logic 1) 1 (Val_0x1): CTS input is asserted (logic 0) |
| DSR | Data Set Ready This bit is used to indicate the current state of the modem control line DSR. When this bit is asserted it is an indication that the modem or data set is ready to establish communications with the UART. In Loopback mode (UART_MCR[LOOPBACK] set to 1), DSR is the same as UART_MCR[DTR]. 0 (Val_0x0): DSR input is deasserted (logic 1) 1 (Val_0x1): DSR input is asserted (logic 0) |
| RI | Ring Indicator This bit is used to indicate the current state of the modem control line RI. When this bit is asserted it is an indication that a telephone ringing signal has been received by the modem data set. In Loopback mode (UART_MCR[LOOPBACK] set to 1), RI is the same as UART_MCR[OUT1]. 0 (Val_0x0): RI input is deasserted (logic 1) 1 (Val_0x1): RI input is asserted (logic 0) |
| DCD | Data Carrier Detect This bit is used to indicate the current state of the modem control line DCD. When the Data Carrier Detect input (DCD) is asserted it is an indication that the carrier has been detected by the modem or data set. In Loopback mode (UART_MCR[LOOPBACK] set to 1), DCD is the same as UART_MCR[OUT2] bit. 0 (Val_0x0): DCD input is deasserted (logic 1) 1 (Val_0x1): DCD input is asserted (logic 0) |